The control unit is one of the most important parts of any digital system. As a rule, control units have an irregular structure, which makes the processing of their logic circuits design very sophisticated. One possible way to optimise such characteristics as the size or performance of control units is to adapt their structures to the particular properties of interpreted control algorithms. In this book control algorithms are represented by the linear graph-schemes of algorithms (GSA), where the number of operator vertices is not less than 75% of the total number of all algorithm vertices. A special class of control units named as compositional microprogram control units (CMCU) is proposed as the best way for interpretation of linear control algorithms. The CMCU includes a finite state machine, which addresses microinstructions of interpreted microprogram, and a microprogram control unit including control memory, which keeps only microoperations of initial GSA. The microprogram control unit uses the principle of natural addressing of microinstructions. Organization of the control unit proposed in the book increases regularity of the circuit, because the system of microoperations is implemented using standard blocks, such as PROM or RAM. At the same time, an irregular part of the system described by means of Boolean functions is reduced. It permits a decrease in the total number of logical elements (PAL, GAL, PLA, FPGA) in comparison with other models of finite state machines. The main goal of all proposed methods is reduction of the number of field-programmable logic devices used for implementation of logic circuit of the addressing FSM. This book will be interesting and useful for students and postgraduates in the area of Computer Science and for designers of modern digital devices. Compositional microprogram control units enlarge the class of models applied for implementation of control units with modern field-programmable logic devices.